University:
Massachusetts Institute of Technology
Course:
6.012 | Microelectronic Devices and Circuits
Academic year:

2019
Views:

284

Pages:

18
Author:

Maxwell Li

Lecture 11 - MOSFET (III) MOSFET Equivalent Circuit Models October 18, 2005 Contents: 1. Low-frequency small-signal equivalent circuit model 2. High-frequency small-signal equivalent circuit model Reading assignment: Howe and Sodini, Ch. 4, §4.5-4.6 Key questions • What is the topology of a small-signal equivalent circuit model of the MOSFET? • What are the key dependencies of the leading model elements in saturation? 1. Low-frequency small-signal equivalent circuit model Regimes of operation of MOSFET: VDSsat=VGS-VT ID saturation linear ID VDS VGS VGS VBS VGS=VT 0 0 cutoff VDS • Cut-off: ID = 0 • Linear: VDS W ID = µnCox (VGS − − VT )VDS 2 L • Saturation: W ID = IDsat = µnCox (VGS −VT )2 [1+λ(VDS −VDSsat)] 2L Effect of back bias: r r VT (VBS ) = VT o + γ( −2φp − VBS − −2φp ) Small-signal device modeling In many applications, interested in response of device to a small-signal applied on top of bias: ID+id vgs + - VGS + v - ds + v - bs VBS VDS Key points: • Small-signal is small ⇒ response of non-linear components becomes linear • Can separate response of MOSFET to bias and small signal. • Since response is linear, superposition can be used ⇒ effects of different small signals are independent from each other MOSFET small-signal equivalent circuit model ID+id + v - ds + v - bs VBS vgs + - VGS VDS ID id = VDS VGS + VBS vgs + - Mathematically: iD (VGS + vgs, VDS + vds, VBS + vbs) ' ∂ID ∂ID ∂ID ID (VGS , VDS , VBS )+ | vds + | vgs + | vbs ∂VDS Q ∂VGS Q ∂VBS Q where Q ≡ bias point (VGS , VDS , VBS ) Small-signal id: id ' gm vgs + govds + gmb vbs Define: gm ≡ transconductance [S] go ≡ output or drain conductance [S] gmb ≡ backgate transconductance [S] Then: gm ' ∂ID |Q ∂VGS go ' ∂ID |Q ∂VDS gmb ' ∂ID |Q ∂VBS + v - ds + v - bs 2 Transconductance In saturation regime: W ID = µnCox (VGS − VT )2 [1 + λ(VDS − VDSsat)] 2L Then (neglecting channel length modulation): ∂ID W gm = | ' µnCox (VGS − VT ) ∂VGS Q L Rewrite in terms of ID : v u u u u t gm = 2 W µnCox ID L gm gm saturation saturation cut-off 0 0 0 VT VGS 0 ID Transconductance of 3 µm nMOSFET (VDS = 2 V ): Equivalent circuit model representation of gm : id G vgs S B D + - gmvgs 2 Output conductance In saturation regime: ID = W µnCox (VGS − VT )2 [1 + λ(VDS − VDSsat)] 2L Then: go = ∂ID W ID µnCox (VGS − VT )2 λ ' λID ∝ |Q = ∂VDS 2L L Output resistance is inverse of output conductance: ro = go 1 L ∝ go ID go saturation saturation cut-off 0 0 0 VT VGS 0 ID Output conductance of 3 µm nMOSFET: Equivalent circuit model representation of go : id G vgs S B D + - ro 2 Backgate transconductance In saturation regime (neglect channel-length modulation): W ID ' µnCox (VGS − VT )2 2L Then: gmb ∂ID W ∂VT = | ) | = µnCox (VGS − VT )(− ∂VBS Q ∂VBS Q L Since: r r VT (VBS ) = VT o + γ( −2φp − VBS − −2φp ) Then: ∂VT −γ r | = ∂VBS Q 2 −2φp − VBS All together: gmb = γgm 2 −2φp − VBS r gmb inherits all dependencies of gm Body of MOSFET is a true gate: output characteristics for different values of VBS (VBS = 0 − (−3) V, ∆VBS = −0.5 V , VGS = 2 V ): Equivalent circuit model representation of gmb : id G vgs S - vbs B D + + gmbvbs Complete MOSFET small-signal equivalent circuit model for low frequency: id G vgs S - vbs B D + + gmvgs gmbvbs ro 2. High-frequency small-signal equivalent circuit model Need to add capacitances. In saturation: gate Cfringe source Cgs,i n+ n+ Cov Cjsw Cfringe drain Cov n+ Csb,i Cj Cjsw Cj p body Cgs ≡ intrinsic gate capacitance + overlap capacitance, Cov (+fringe) Cgd ≡ overlap capacitance, Cov (+fringe) Cgb ≡ (only parasitic capacitance) Csb ≡ source junction depletion capacitance +sidewall (+channel-substrate capacitance) Cdb ≡ drain junction depletion capacitance +sidewall Complete MOSFET high-frequency small-signal equivalent circuit model: id Cgd G vgs S D + Cgs gmbvbs ro - vbs B gmvgs Csb + Cdb Plan for development of capacitance model: • Start with Cgs,i – compute gate charge QG = −(QN + QB ) – compute how QG changes with VGS • Add pn junction capacitances Inversion layer charge in saturation QN (VGS ) = W Z L 0 Qn (y)dy =W Z VGS −VT 0 Qn(Vc ) dy dVc dVc But: dVc ID =− dy W µnQn(Vc ) Then: W 2Lµn Z VGS −VT 2 QN (VGS ) = − Qn(Vc )dVc 0 ID Remember: Qn(Vc ) = −Cox (VGS − Vc − VT ) Then: 2 Z W 2Lµn Cox VGS −VT 2 QN (VGS ) = − (V − V − V ) dVc GS c T 0 ID Do integral, substitute ID in saturation and get: 2 QN (VGS ) = − W LCox (VGS − VT ) 3 Gate charge: QG(VGS ) = −QN (VGS ) − QB,max Intrinsic gate-to-source capacitance: Cgs,i dQG 2 = = W LCox dVGS 3 Must add overlap capacitance: 2 Cgs = W LCox + W Cov 3 Gate-to-drain capacitance - only overlap capacitance: Cgd = W Cov body polysilicon gate source drain gate n+ p+ n+ n+ p inversion layer channel n gate oxide gate length p+ p n+ n+ n+ gate width n n+ STI edge Body-to-source capacitance = source junction capacitance: v u u u u diff u t Csb = Cj +Cjsw = W L qsNa +(2Ldiff +W )CJ SW 2(φB − VBS ) Body-to-drain capacitance = drain junction capacitance: v u u u u diff u t Cdb = Cj +Cjsw = W L qs Na +(2Ldiff +W )CJ SW 2(φB − VBD ) Key conclusions High-frequency small-signal equivalent circuit model of MOSFET: id Cgd G vgs S Cgs gmbvbs gmvgs - vbs B D + Csb + Cdb In saturation: v u u u u t W gm ∝ ID L go ∝ ID L Cgs ∝ W LCox ro