University:
Mt. San Antonio College
Course:
ELEC 74 | Microprocessor Systems
Academic year:

2024
Views:

375

Pages:

2
Author:

Dipin K.

8086 microprocessor – External memory interfacing – bus cycle –some important companion chips The 8086 microprocessor is equipped to communicate with external memory, such as RAM and ROM, for data storage and retrieval. This communication is facilitated through the system bus, comprising the address bus, data bus, and control bus. The 8086 utilizes a memory-mapped I/O architecture, treating I/O devices as memory locations. System Bus: The system bus serves as the primary communication channel between the 8086 and external devices. It includes: - Address bus: A 20-bit bus specifying the memory location or I/O device being accessed. - Data bus: A 16-bit bus carrying the data transferred between the processor and external devices. - Control bus: A collection of signals controlling the timing and operation of the system bus. Memory Addressing: The 8086 employs a segmented memory architecture, dividing memory into 64 KB segments, each identified by a segment register (CS, DS, SS, or ES). The physical address of a memory location is calculated by adding the contents of a segment register to the offset address. Bus Cycle: A bus cycle encompasses the sequence of events when the 8086 accesses external memory. It typically includes the following phases: - Address phase: The 8086 places the memory address on the address bus. - Read/write phase: The 8086 asserts the read or write signal on the control bus, indicating the desired action. - Data phase: The external memory device places data on the data bus if the read signal is asserted, or the 8086 places data on the data bus if the write signal is asserted. - Wait state: The external memory device can assert the wait signal on the control bus if it requires additional time to respond, causing the 8086 to pause until the device is ready. Important Companion Chips: To interface the 8086 with external memory, several companion chips are typically used: 1. Memory Management Unit (MMU): Implements virtual memory, translating virtual addresses into physical addresses. 2. Bus Interface Unit (BIU): Manages memory addressing and system bus operations, and can implement features like wait states and bus arbitration. 3. Direct Memory Access (DMA) Controller: Transfers data between memory and external devices without involving the processor, improving system performance and reducing the processor's workload. 4. Interrupt Controller: Handles interrupts from external devices, enabling the processor to respond to events promptly. 5. Clock Generator: Provides timing signals controlling the operation of the system bus and the 8086. The 8086 microprocessor's ability to interface with external memory is crucial for its functionality and versatility. Understanding the system bus, memory addressing, bus cycles, and the role of companion chips enables engineers to effectively design and implement systems based on the 8086.